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LTC1566-1 Low Noise 2.3MHz Continuous Time Lowpass Filter
FEATURES
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DESCRIPTIO
7th Order, 2.3MHz Lowpass Filter in an SO-8 62VRMS Input Referred Noise Operates on a Single 5V or a 5V Supply Differential Inputs and Outputs Low Offset (3mV typical, 10mVMAX) Adjustable Output Common Mode Voltage 40dB Attenuation at 1.5 x fCUTOFF Requires No External Components
The LTC(R)1566-1 is a 7th order continuous time lowpass filter with 12dB of passband gain. The selectivity, linearity and dynamic range makes the LTC1566-1 suitable for filtering in data communications or data acquisition systems. The filter attenuation is 40dB at 1.5 x fCUTOFF and at least 60dB for frequencies above 10MHz. The LTC1566-1 has an input referred noise of 62VRMS in a 2MHz bandwidth. In receiver applications where the signal levels are small, the filter features 71dB of spurious free dynamic range. With 5% accuracy of the cutoff frequency, the LTC1566-1 can be used in applications requiring pairs of matched filters, such as transceiver I and Q channels. The differential inputs and outputs provide a simple interface for wireless systems. The high impedance inputs are easily coupled to differential demodulators or D/A converters. The output DC common mode voltage and output DC offset voltage are adjustable so the signal path can be optimized for driving an A/D converter or differential modulator. Other cutoff frequencies and single-ended I/O can be provided upon request. Please contact LTC Marketing.
APPLICATIO S
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WCDMA Basestations Communication Filters Antialiasing Filters Smoothing or Reconstruction Filters Matched Filter Pairs Replacement for LC Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Frequency Response
20 10 0 GAIN 1000 900 800 700 600 DELAY 500 400 300 200 100 0.1 1.0 10 FREQUENCY (MHz) 0 100
1566-1 G01
Single 5V Supply, Differential 2.3MHz Lowpass Filter
+ VIN - 2 IN - 1 IN + LTC1566-1 OUT - 7 OUT + 8 + VOUT -
-10
GAIN (dB)
-20 -30 -40 -50
3 10k 0.1F 4
GND
V+
6 10k 0.1F
5V
-60 -70 -80
V-
VODC
5
1566-1 TA01
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DELAY (ns)
1
LTC1566-1
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW IN + 1 IN - 2 GND 3 V- 4 8 OUT + 7 OUT - 6 V+ 5 VODC
Total Supply Voltage ................................................ 11V Power Dissipation .............................................. 500mW Operating Temperature Range LTC1566-1CS .......................................... 0C to 70C LTC1566-1IS ...................................... - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC1566-1CS8 LTC1566-1IS8 S8 PART MARKING 15661 15661I
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125C, JA = 80C/W (Note 4)
Consult factory for parts specified with wider operating temperature ranges.
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V (V+ = 5V, V- = 0V), RLOAD = 10k from each output to AC ground, Pin 5 connected to Pin 3, Pin 3 biased to mid supply, unless otherwise specified.
PARAMETER Filter Gain, VS = 5V CONDITIONS VIN = 0.25VP-P fIN = 20kHz to 100kHz fIN = 1.8MHz (Gain Relative to 100kHz) fIN = 2MHz (Gain Relative to 100kHz) fIN = 2.3MHz (Gain Relative to 100kHz) fIN = 3MHz (Gain Relative to 100kHz) fIN = 5MHz (Gain Relative to 100kHz) fIN = 10MHz (Gain Relative to 100kHz) Filter Phase, VS = 5V Phase Linearity, VS = 5V Filter Gain, VS = 5V VIN = 0.25VP-P VIN = 0.25VP-P fIN = 900kHz fIN = 1.8MHz Ratio of phases: 1.8MHz/900kHz fIN = 20kHz to 100kHz fIN = 900kHz (Gain Relative to 100kHz) fIN = 1.8MHz (Gain Relative to 100kHz) fIN = 2MHz (Gain Relative to 100kHz) fIN = 2.3MHz (Gain Relative to 100kHz) fIN = 3MHz (Gain Relative to 100kHz) fIN = 5MHz (Gain Relative to 100kHz) fIN = 10MHz (Gain Relative to 100kHz) Input Referred Wideband Noise THD Filter Differential DC Swing Input Bias Current Input Offset Current Input Resistance Input Capacitance Output DC Offset (Notes 3, 5) VS = 5V VS = 5V Common Mode, VIN = 1.5V to 3.5V Differential Noise BW = 50kHz to 2MHz fIN = 100kHz, VOUT = 2VP-P (Note 2) Maximum Difference Between Pins 7 and Pin 8 with Pin 5, Pin 3 Biased to Mid Supply VS = 5V VS = 5V
q q q q q q q q
ELECTRICAL CHARACTERISTICS
MIN 11.8 -0.35 -0.85 -7.5
TYP 12.1 0 - 0.1 -3 - 22 - 42 - 62 -150 -285 1.95 12.1 0 0.1 0.1 -2 - 20 - 61 -61 62 80
MAX 12.3 0.5 0.5 -0.95 -17
UNITS dB dB dB dB dB dB dB deg deg dB dB dB dB dB dB dB dB VRMS dB VP VP
q q q q q q q q q
-160 -320 1.9 11.9 -0.2 -0.3 -0.55 -6
-135 -265 2 12.3 0.2 0.7 0.75 -0.3 -16
1.3 2.7
1.7 2.9 300 10 70 140 2 3 3 10 10 600
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nA nA M M pF mV mV
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LTC1566-1
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V (V+ = 5V, V- = 0V), RLOAD = 10k from each output to AC ground, and Pin 5 connected to Pin 3 unless otherwise specified
PARAMETER Output DC Offset Drift Output DC Common Mode Voltage Power Supply Current Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Input and output voltages expressed as peak-to-peak numbers are assumed to be fully differential. Note 3: Output DC offset is measured between Pin 8 and Pin 7 with Pin 1, Pin 2 and Pin 5 connected to Pin 3. Pin 3 biased to mid supply. VS = 5V, VS = 2.5V VS = 5V VS = 5V
q q
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN VS = 5V VS = 5V
TYP -160 -160 -80 24 25
MAX
UNITS V/C V/C mV
31 33
mA mA
Note 4: Thermal resistance varies depending upon the amount of PC board metal attached to the device. JA is specified for a 3.8 square inch test board covered with 2oz copper on both sides. Note 5: Output DC offset measurements are performed by automatic test equipment approximately 0.5 seconds after application of power.
TYPICAL PERFOR A CE CHARACTERISTICS
Passband Gain and Delay vs Frequency
12.4 TA = 25C GAIN 5V GAIN 5V 1
12.0
GAIN (dB)
11.2
DELAY
GAIN (dB)
GAIN (dB)
11.6
10.8
10.4 10k
100k 1M FREQUENCY (Hz)
Stopband Gain vs Frequency and Temperature
-10 VS = 5V
-20
VOUT (dBm)
GAIN (dB)
-30
VOUT (dBm)
TA = 25C
-40
TA = -40, 85C
-50
-60
3
4
5 6 7 8 FREQUENCY (MHz)
UW
1566-1 G02
Passband Gain vs Frequency and Temperature
12.4 TA = -40C TA = 85C TA = 25C -10
Stopband Gain vs Frequency
TA = 25C 5V 5V
12.0
-20
11.6
-30
DELAY (s)
11.2
-40
10.8
-50
0 5M
10.4 10k
-60 100k 1M FREQUENCY (Hz) 5M
1566-1 G03
3
4
5 6 7 8 FREQUENCY (MHz)
9
10
1566-1 G04
450k/2M Intermodulation, VS = 5V
20 0 -20 -40 -60 -80 -100 -25 450k 1.55M 2M 2.45M 3.55M NOISE FLOOR 1.1M 40 20 0 -20 -40 -60 OIP3 = 38dBm OIP2 = 74dBm 0 -15 -10 -5 VX (dBm) VIN = VX COS(2 * 450kHz) + VX COS (2 * 2MHz) -20
1566-1 G06
500kHz Distortion vs Input Level, VS = 5V
1dB COMPRESSION
500kHz 1MHz 1.5MHz NOISE FLOOR
-80 -100 -25 -20
9
10
-15
-10 -5 VIN (dbm)
0
5
10
1566-1 G05
1566-1 G07
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LTC1566-1 TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Temperature
23
SUPPLY CURRENT (mA)
VS = 5V
CMRR (dB)
22
60 50
PSRR (dB)
VS = 5V
21 -50
-30
-10
10
30
50
TEMPERATURE (C)
1566-1 G08
PI FU CTIO S
IN+, IN - (Pins 1, 2): Input Pins. Signals can be applied to either or both input pins. The DC gain from differential inputs (Pin 1 to Pin 2) to the differential outputs (Pin 8 to Pin 7) is 4V/V. The input range is described in the Applications Information section. GND (Pin 3): Ground. The ground pin is the reference voltage for the filter. This is a high impedance input, which requires an external biasing network. Biasing GND to one-half the total power supply voltage of the filter maximizes the dynamic range. For single supply operation the ground pin should be bypassed with a quality 0.1F ceramic capacitor to Pin 4. For dual supply operation, connect Pin 3 to a high quality DC ground. A ground plane should be used. A poor ground will increase noise and distortion. Pin 3 also serves as the DC reference voltage for Pin 7. V -, V + (Pins 4, 6): Power Supply Pins. For a single 5V supply (Pin 4 grounded) a quality 0.1F ceramic bypass capacitor is required from the positive supply pin (Pin 6) to the negative supply pin (Pin 4). The bypass should be as close as possible to the IC. For dual supply applications (Pin 3 is grounded), bypass Pin 6 to Pin 3 and Pin 4 to Pin 3 with a quality 0.1F ceramic capacitor. VODC (Pin 5): Output DC Offset. Pin 5 is the DC reference voltage for Pin 8. By applying a DC offset between Pin 3 and Pin 5, a DC offset will be added to the differential signal between Pin 7 and Pin 8. Like the GND pin, the VODC pin is a high impedance which requires no bias current. Care should be taken when biasing Pin 5 since noise between Pin 3 and Pin 5 will appear at the filter output unattenuated. The frequency response of Pin 5 is described in the Applications Information section. OUT - , OUT + (Pins 7, 8): Output Pins. Pins 7 and 8 are the filter differential outputs. Each pin can drive 1k or 300pF loads. The DC reference voltage of Pin 8 is the same as the voltage at Pin 5. The DC reference voltage of Pin 7 is the same as the voltage at Pin 3.
4
UW
70
Common Mode Rejection Ratio
90 80 70
50
Power Supply Rejection Ratio
70 VIN = 0.2VP-P VS = 5V TA = 25C
VIN = 1VP-P VS = 5V TA = 25C
60
40
40 30
30
20
90
1k
10k
100k 1M FREQUENCY (Hz)
10M
1566-1 G09
1k
10k
100k 1M FREQUENCY (Hz)
10M
1566-1 G10
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LTC1566-1
BLOCK DIAGRA
IN + 1
+
1x
- +
-
1x IN
-
2
+
INPUT AMPLIFIERS WITH COMMON MODE TRANSLATION CIRCUIT
GND V-
3 UNITY GAIN OUTPUT BUFFERS WITH DC REFERENCE ADJUSTMENT
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APPLICATIO S I FOR ATIO
Interfacing to the LTC1566-1
The difference between the voltages at Pin 1 and Pin 2 is the "differential input voltage." The average of the voltages at Pin 1 and Pin 2 is the "common mode input voltage." The difference between the voltages at Pin 7 and Pin 8 is the "differential output voltage." The average of the voltages at Pin 7 and Pin 8 is the "common mode output voltage." The input and output common mode voltages are independent. The input common mode voltage is set by the signal source, if DC coupled, or by an external
1
IN +
OUT +
8
VOUT+
-
+ -
VIN+
LTC1566-1 2 VIN- 10k IN - OUT - 7 VOUT
+ -
3 0.1F 4
GND
V+
6 10k
V-
VODC
5
1566-1 F01
DC COUPLED INPUT V + + VIN- VIN (COMMON MODE) = IN
2
V VOUT (COMMON MODE) = OUT
++V
2
OUT =
-
V+
2
Figure 1
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-
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-
R 1x 8 OUT +
+
R 7th ORDER FILTER NETWORK WITH 12dB GAIN
-
1x 7 OUT -
+
6 V+
5
1566-1 BD
VODC
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biasing network, if AC coupled (Figures 1 and 2). The output can also be AC coupled. The output common mode voltage is equal to the voltage of Pin 3, the GND pin, whenever Pin 5 is shorted to Pin 3. In configurations where Pin 5, the VODC pin, is not shorted to Pin 3, the output common mode voltage is equal to the average of the voltages at Pin 3 and Pin 5. The operation of Pin 5 is described in the paragraph "Output DC Offset Control". Pin 3 is a high impedance pin and must be biased externally with an external resistor network or reference voltage.
0.1F 1 IN + OUT + 8 VOUT+ VOUT-
+ -
5V 0.1F
VIN+ 0.1F
100k 2 100k 3 10k 0.1F 4
LTC1566-1 IN - OUT - 7
VIN-
+ -
GND
V+
6 10k
5V 0.1F
V-
VODC
5
1566-1 F02
AC COUPLED INPUT VIN (COMMON MODE) = VOUT (COMMON MODE) =
V+
2
Figure 2
sn15661 1566-1fs
5
LTC1566-1
APPLICATIO S I FOR ATIO U
a common mode voltage that is equal to one-half of the total supply voltage. Figure 5 illustrates the THD versus output common mode voltage for a 0.5VP-P/2.0VP-P differential input/output voltage and a common mode input voltage that is equal to one-half the total supply voltage. Output DC Offset Control A unique feature of the LTC1566-1 is the ability to introduce a differential offset voltage at the output of the filter. As seen in the "Block Diagram", if a DC voltage is applied to Pin 5 with respect to Pin 3, the same voltage will be added to the differential voltage seen between Pins 8 and 7. The output DC offset control pin can be used for sideband suppression in differential modulators, calibration of A/D converters, or simple signal summation. Since the voltage summing occurs at the output of the filter, Pin 5 acts as a unfiltered input. The response from Pin 5 to Pin 8 - Pin 7 with Pins 1,2 and 3 grounded is shown in Figure 7. The range of voltages that can be applied to Pin 5 is shown in Figure 6 where THD is plotted versus output offset. Pin 3 is biased to mid supply. Output Drive Pins 7 and 8 can drive a 1k or 300pF load connected to AC ground with a 0.5V signal (corresponding to a 2VP-P differential signal). For differential loads (loads connected across Pins 7 and 8) the outputs can produce a 2VP-P differential signal across 2k or 150pF. For smaller signal amplitudes the outputs can drive correspondingly larger loads.
- 30 VS = 5V VS = 5V S/N - 40 - 50 THD (dB) - 60 - 70 - 80 - 90 VS = 5V VS = 5V 1.0 3.5 3.0 1.5 2.0 2.5 DIFFERENTIAL OUTPUT (VP-P) 4.0 -4 0 1 3 2 - 3 - 2 -1 OUTPUT COMMON MODE VOLTAGE (V) 4
1566-1 F04 1566-1 F05
Input Common Mode and Differential Voltage Range The range of voltage each input can support while operating in its linear region is typically 0.8V to 3.7V for a single 5V supply and - 4.2V to 3.2V for a 5V supply. Therefore, the filter can accept a variety of common mode input voltages. Figure 3 shows the total harmonic distortion of the filter versus input common mode voltage with a 2VP-P differential output signal. Figure 4 shows the total harmonic distortion and signal to noise ratio versus differential output voltage level for both a single 5V and a 5V supply. The common mode voltage of the input signal is one-half the total power supply voltage of the filter. The spurious free dynamic range (SFDR), the level where the THD and S/N ratio are equal, is 72dB. For best performance, the inputs should be driven differentially. For single-ended signals, connect the unused input to Pin 3 or a common mode reference. The filter DC differential swings listed in the "Electrical Characteristics" are measured with input differential voltages of 0.9VP-P and 1.5VP-P for 5V and 5V supplies respectively. Ideally the corresponding output levels would be 3.6VP-P and 6VP-P. As seen in Figure 4, these levels are above the range of linear operation. Input signals larger than 0.9VP-P/1.5VP-P will result in phase inversion and should be avoided. Output Common Mode and Differential Voltage Range The output is a fully differential signal with a common mode level equal to the voltage at Pin 3 when Pin 5 is shorted to Pin 3. The best performance is achieved using
-30 -40
THD, SNR (dB) - 30
VS = 5V VS = 5V
-50
THD (dB)
-60 -70 -80 -90
-5 -4 -3
-2 -1
0
1
2
3
4
5
INPUT COMMON MODE VOLTAGE (V)
1566-1 F03
Figure 3
6
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- 40 - 50 - 60 - 70 - 80 - 90 0.5
Figure 4
Figure 5
sn15661 1566-1fs
LTC1566-1
APPLICATIO S I FOR ATIO
- 30 - 40 - 50
THD (dB)
VS = 5V VS = 5V
- 60 - 70 - 80 - 90 -3
-2
2 -1 0 1 PIN 5 DC VOLTAGE (V)
3
4
1566-1 F06
Figure 6
2.5 VIN = 200mVP-P
PIN 8 - PIN 7 (dB) PIN 5
0
GAIN
VS = 5V VS = 5V - 2.5 10k 100k 1M FREQUENCY (Hz) 10M
1566-1 F07
Figure 7
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP 0.053 - 0.069 (1.346 - 1.752) 8 0.004 - 0.010 (0.101 - 0.254) 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 7 6 5
0.014 - 0.019 (0.355 - 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.016 - 0.050 (0.406 - 1.270)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Noise The wideband noise of the filter is the RMS value of the output noise power spectral density integrated over a given bandwidth. Since the filter has a DC gain of 4, the wideband noise is divided by 4 when referred to the input. The input referred wideband noise is used to determine the signal-to-noise ratio at a given distortion level and hence the spurious free dynamic range. Most of the noise is concentrated in the filter passband and cannot be removed with post filtering (Table 1). The noise is mostly independent of supply level (Table 2).
Table 1. Input Referred Wideband Noise vs Bandwidth, Single 5V Supply
BANDWIDTH 50kHz to 2MHz 50kHz to 4MHz TOTAL INTEGRATED NOISE 62VRMS 76VRMS
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Table 2. Input Referred Wideband Noise vs Supply Voltage, 50kHz to 2MHz
BANDWIDTH VS = 5V VS = 5V TOTAL INTEGRATED NOISE 62VRMS 63VRMS
0.050 (1.270) BSC
SO8 1298
1
2
3
4
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LTC1566-1
TYPICAL APPLICATIO S
A Fixture for Evaluation with Single-Ended, Ground Referenced Test Equipment
MINICIRCUITS SPLITTER ZSCJ-2-2 0 VIN 50 2 50 3 S1 CLOSE SWITCH S1 AND APPLY A VOLTAGE -2.5V TO ALTER THE OUTPUT COMMON MODE. 0.1F 4 10k 0.1F 1 IN + OUT + 15V 8 5k 5k 7 5k
CLOSE SWITCH S2 AND APPLY A VOLTAGE TO ADD A DC OFFSET. CHANGE THE POWER SUPPLY VOLTAGES TO ALTER THE INPUT COMMON MODE VOLTAGE. FOR EXAMPLE, VS = 3, -2 MAKES THE EFFECTIVE INPUT COMMON MODE -0.5V BELOW MID SUPPLY. S2
Simple Pulse Shaping Circuit for Single 5V Operation, 5Mbps 2 Level Data
1 5V 2k 15k 2k 10k 0.1F 10k 5V 2 IN + OUT + 8
5Mbps DATA
RELATED PARTS
PART NUMBER LTC1560-1 LTC1562/LTC1562-2 DESCRIPTION 1MHz/500kHz Continuous Time, Lowpass Elliptic Filter Universal 8th Order Active RC Filters COMMENTS fCUTTOFF = 500kHz or 1MHz fCUTOFF(MAX) = 150kHz (LTC1562), fCUTOFF(MAX) = 300kHz (LTC1562-2) fCUTOFF(MAX) = 256kHz 7th Order, Differential Inputs and Outputs fCLK/fCUTOFF = 64/1, fCUTOFF(MAX) = 75kHz (LTC1569-6), fCLK/fCUTOFF = 32/1, fCUTOFF(MAX) = 300kHz (LTC1569-7)
sn15661 1566-1fs LT/TP 0101 4K * PRINTED IN USA
LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters LTC1565-31 650kHz Continuous Time, Linear Phase Lowpass Filter LTC1569-6/LTC1569-7 Self Clocked, 10th Order Linear Phase Lowpass Filters
8
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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+
LT1363 VOUT
LTC1566-1 IN - OUT -
-
2.5V -15V 5k
GND
V+
6 10k
V-
VODC
5 1k
0.1F
1566-1 TA01a
+
VOUT
LTC1566-1 IN - OUT - 7
-
5V 0.1F
3
GND
V+
6
300mV/ 0 DIV
4
V-
VODC
5
1566-1 TA02a
50ns/DIV
1566-1 TA02b
Wideband CDMA Base Station Receiver Block Diagram
LTC1566-1 LPF 0 I RF/IF SECTION 0/90 90 LTC1566-1 LPF ADC
1566-1 TA03
ADC
LO
Q DSP
(c) LINEAR TECHNOLOGY CORPORATION 2001

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